H616 User Manual見てみたけど…SDRAMコントローラはレジスタ一覧などの詳細な説明、無いぞ…

mctl_phy_read_training()の最初の方にある、mctl_await_completion((u32 *)(SUNXI_DRAM_PHY0_BASE + 0x840), 0xc, 0xc);の後でコケてる。これが何を意味するかは…DRAMコントローラの説明を読まないと分からん。

デバッグ用のメッセージは出せるようになったし、16bit rank=2のテストをパスしないといけないが確かに失敗してるということまでは分かったが…

U-Boot SPL 2023.07-rc2-00218-g6dcee70692-dirty (May 28 2023 - 21:13:24 +0900)
DRAM:testing 32-bit width, rank = 2
read calibration failed!
testing 32-bit width, rank = 1
read calibration failed!
testing 16-bit width, rank = 2
read training failed!
testing 16-bit width, rank = 1
write training failed!
This DRAM setup is currently not supported.

resetting ...

U-Boot SPL 2023.07-rc2-00218-g6dcee70692-dirty (May 28 2023 - 21:13:24 +0900)
DRAM:testing 32-bit width, rank = 2
read calibration failed!
testing 32-bit width, rank = 1
read calibration failed!
testing 16-bit width, rank = 2
read training failed!
testing 16-bit width, rank = 1
read training failed!
This DRAM setup is currently not supported.

resetting ...